Aart de Geus
Chair and Chief Executive Officer at Synopsys
Thanks, Sassine. You have my full support. Now let's turn to what we're seeing in the market. Technology industry trends are playing to our strengths. The AI-driven, Smart Everything era is putting positive pressure on the semiconductor industry to deliver more.
Despite economic challenges, semiconductor design starts and R&D investments continue unabated. Our relentless innovation drive has made Synopsys a catalyst for our customers' success in this new growth era for semiconductors. In fact, the market is playing out much as we expected when we planned the year, and we are executing accordingly.
Based on continued strong design activity, our high confidence -- and high confidence in our business, we are raising our full-year revenue guidance range to between $5.81 billion and $5.84 billion. We are increasing our year-over-year non-GAAP ops margin improvement expectation to 200 basis points. This is approximately 0.5 point up versus prior guidance. We are raising our full-year non-GAAP EPS range to between $11.04 and $11.09. Shelagh will give you -- will discuss the financials in more detail.
Prior to giving color on our segment results, let me update you on our AI progress. By now, I hope that we all understand that AI can, and does, and has further potential to unlock massive new productivity gains. So, while we continue to embed AI in everything we do, not surprisingly, one consistent question most of you are asking is how we'll monetize our AI leadership. Let me address that question head-on through the techonomic lens of product differentiation and business model framework, including some early proof points.
For AI monetization, we see three distinct value streams: first, through our design participation in the explosive growth in demand for AI chips; second, by pervasively embedding our pioneering AI across our full EDA stack, which we call Synopsys.ai; and third, through AI-driven efficiency transformations, as we optimize and automate our own internal workflows.
Let's start with AI chips. Use cases for AI are proliferating rapidly, as are the number of companies designing AI chips. Novel architectures are multiplying, stimulated by vertical markets all wanting solutions optimized for their specific applications. Third parties estimate that today's $20 billion to $30 billion market for AI chips will exceed $100 billion by 2030. In this new era of Smart Everything, these chips in turn drive growth in surrounding semiconductors for storage, connectivity, sensing, AtoD and DtoA converters, power management, etc.
Growth predictions for the entire semi market to pass $1 trillion by 2030 are thus quite credible. We are uniquely positioned to benefit. In the semi ecosystem, Synopsys is the leading EDA provider to AI chip designers; designers requiring unmatched capabilities in design tools, particularly at the most advanced process nodes. They also need our leading interface IP portfolio, as AI chips are banking on enormous amounts of data driving new, faster and lower power interconnect protocols. Synopsys excels at this.
In summary, AI chips are a core value stream for Synopsys, already accounting, on a trailing 12-month basis, for well over $0.5 billion. We see this growth continuing throughout the decade.
Let's move to our second value stream, Synopsys.ai. This is where, starting in 2017, Synopsys, incidentally, led by Sassine, pioneered AI-driven chip design, and we have relentlessly advanced the state-of-the-art ever since. Using our AI to automate entire design sub-flows, our customers report schedule reductions from months to weeks, while simultaneously also achieving better results in terms of speed, power and area of the chips.
In February, we reported that our customers had passed 100 commercial tape-outs using our AI. Today, the tally crossed 270, as adoption continues rapidly. Nine out of 10 of the top semiconductor vendors are using Synopsys.ai in production and the 10th one is already testing our solution. What makes this doubly relevant is that the worldwide semi industry has a significant resource shortage. Third parties estimate a design engineering gap of between 15% to 30% by 2030.
Even the multiplicity of national CHIPS Act recognizes this, and AI in design automation will be critical to help bridge the gap. That's where the industry's first AI-driven full EDA suite, Synopsys.ai, comes in.
Initially launched in 2020 for design optimization, we have since added AI-driven test and verification flows now in commercial adoption. Usage is expanding rapidly as customers are seeing stunning results. In the last quarter, our customers have demonstrated up to 10x faster turnaround time and double-digit improvements in verification coverage. Customers are also reporting more than 20% silicon test cost reduction.
Recently, we engaged Synopsys.ai for analog and custom design. One of our top customers used our AI-optimized Custom Compiler to achieve a 6% performance improvement over manually crafted custom circuits. Further completing our Synopsys.ai stack, more AI-driven manufacturing flow extensions are coming soon. But back to the economics.
Synopsys.ai revenue is just starting to ramp, but early proof points give us high confidence in its long-term growth prospects. We've moved from project-based experimentations to customers now adding Synopsys.ai subscriptions. Synopsys.ai has driven more than 20% value increases in several recent digital implementation renewals, often leveraging significant growth for the underlying core tools used by Synopsys.ai. This quarter, we saw multiple full-flow displacements to Synopsys.ai driven by up to 10x productivity differentiation versus the competition, which brings me to generative AI.
Over our history, key disruptive technologies have catalyzed innovation opportunities for Synopsys to deliver leaps in productivity. Gen AI is such a technology. Anchored in 35-plus years of experience in developing model-based solutions, now with an unparalleled data asset portfolio, we intend to harness gen AI capabilities into Synopsys.ai. We see this delivering further advances in design assistance, design exploration, and design generation.
On the design flow spectrum from optionality to optimality, in other words, moving from many options in early architectures, to highly-tuned, error-free tape-outs, gen AI techniques will augment the exploration, accelerate design choices, and automate some design generation. This will further broaden the intelligence dimensions in Synopsys.ai. These new capabilities represent additional customer value, opening multiple new monetization opportunities. We will elaborate more on our roadmap in the coming quarters, which brings me to our third monetization value stream, operational efficiency transformations.
Gen AI isn't just an opportunity for our customers. We, ourselves, fully intend to eat at our own AI restaurant, so to speak. We see significant operational efficiency and automation potential in processes across the company, so that our employees can focus on higher ROI tasks. Our experimentation is in full swing and we are rapidly learning the strengths and challenges [Phonetic] of these new approaches.
Overall, fast progress on our AI journey and it is great to have Sassine on the call for Q&A as he is very focused on our AI business strategy and monetization.
Let me now give some color on our segments of Design Automation at roughly 65% of our business, Design IP at about 25%, and Software Integrity at around 10%.
Starting with Design Automation, we saw strong revenue momentum and the segment delivered its first $1 billion quarter. Fusion Compiler momentum continues to grow with increased customer share and Synopsys-enabled customers taping out first to a number of leading manufacturing nodes, including TSMC N2 and N5A, Samsung SF3 and Intel 18A. Fusion leadership at advanced nodes has also translated into key HPC core wins at both semiconductor and hyperscale companies.
Transitioning to multi-die chip design, our 3DIC Compiler platform continued momentum across verticals, achieving deployment on the industry's first advanced 3D-stacked heterogeneous design for smartphones. We also expanded our multi-die ecosystem enablement, including qualification for leading foundries' latest multi-die flows, and support for key 3D design standards. Of note, we deepened our collaboration with Samsung Foundry to accelerate multi-die system design for advanced processes.
Let's move to verification, where the need for acceleration is paramount. In Q3, we won a Zebu hardware-assisted verification engagement with a RISC-V AI chip provider, and saw HAPS deployments for prototyping AI chips at a large hyperscaler and a large HPC company.
Synopsys Cloud continues to deliver substantial differentiation and time-to-market gains for our customers. Our SaaS solution, which accounts for 70% of our cloud users, continues to gain strong adoption with multiple AI chip start-ups leading new SaaS deployments.
Now turning to Design IP, which is roughly 25% of our revenue. We had an excellent quarter working closely with some of our partners to enable the most advanced process nodes in the design ecosystem. Just this week, Synopsys and Intel announced a very significant expansion of our long-standing strategic partnership in EDA and IP, to speed the design and manufacturing of advanced SoCs and multi-die systems for Intel processes. This comprehensive agreement enables Intel's internal IDM 2.0 teams and their external foundry customers to accelerate chip and system designs with a powerful portfolio of essential IP developed by Synopsys for Intel 3 and 18A processes.
Synopsys IP is now key to ramping and filling multi-billion dollar wafer fabs as the advanced node IP supplier of choice for customers and the manufacturing ecosystem. Further supporting this, in Q3, we also announced the industry's broadest portfolio of silicon-proven IP for TSMC's N3E process as well as an extensive portfolio of IP for all of Samsung Foundry's advanced process technologies.
In automotive, autonomous driving ADAS systems continue to drive strong demand for our IP. This quarter we exceeded 30 design wins in 5 nanometer and won our first 3 nanometer design at a marquee automotive OEM. All in all, we have won IP sockets on more than 100 ADAS chips.
Third, the Software Integrity segment, which represents 10% of our revenue. Against a continued challenging macro environment for enterprise software, the business delivered solid results. The imperative for security and quality in software has always been critical, and with the rise in gen AI generated code, big new risks are emerging. Racing forward, we continue to develop innovative new solutions like our AI code analysis API offering on our Polaris SaaS platform.
AI code analysis API enables developers to automatically submit code snippets from code assistants such as GitHub Copilot and ChatGPT to receive instant feedback on whether the code may originate from risky open-source projects.
In summary, we had outstanding Q3 financial results and operational execution and are confident in a strong close to the year. We are raising our guidance for full-year revenue and year-over-year ops margin, as well as non-GAAP earnings per share expectations.
We have a resilient business model, and our customers continue to prioritize investments in the chips and systems that position them for future growth. We continue to invest in technology leadership, multi-die design solutions, state-of-the-art IP, and the leading-edge AI-driven EDA suite to help catalyze this decade of smart, secure and safe products. And last, but certainly not least, I am just delighted to welcome Sassine as our next CEO. I would like to thank our employees and our partners for their passion and commitment.
With that, I'll turn it over to Shelagh.
