Sassine Ghazi
President & Chief Executive Officer at Synopsys
Good afternoon.
We delivered excellent results in the third quarter exceeding the midpoint of all our guidance targets while setting another quarterly revenue record. We positioned the company's portfolio with 1 strategic end in mind, maximizing the value that we deliver to customers in the era of pervasive intelligence. Our focus is on leading innovation in EDA and IP while deepening our differentiation in software-defined systems. Against this strategic backdrop, the Synopsys team continued its strong operational execution in the quarter and commercial momentum remains robust. Revenue was up 13% year-over-year at the high end of our guided range. Non-GAAP operating margin was 40%, up 3.6 points year-over-year. And non-GAAP EPS was up 27% year-over-year and above our guidance range. We continue to be confident and our guidance for industry-leading double-digit revenue growth. Shelagh will discuss the financials in more detail.
First, I'll give some context for our confidence, which is grounded in the continued strong execution of our Synopsys team and industry trends, reinforced by our customers and partners. Since becoming Synopsys CEO in January, I have traveled to 8 countries, participating in more than 140 meetings with over 80 customers and partners, discussing their challenges and understanding their priorities. The message in every meeting is loud and clear. Synopsys is mission-critical to their innovation, which makes our business uniquely resilient. Our success is tied to technology innovation cycles, not end market dynamics. In this era of pervasive intelligence technology innovation is only accelerating, fueled by the rise of artificial intelligence, silicon proliferation and software-defined systems. The evidence is all around us.
Our silicon customers are racing to design the many components necessary to optimize AI infrastructure. Remarkably design cycles are contracting despite mounting complexity, and we help make this possible. This combination of pace and complexity equals good news for Synopsys. Artificial intelligence is driving incredible demand for high-performance computing and data centers and new AI-powered smartphones and PCs, which are poised for an exciting refresh thanks to silicon innovation. Bottom line, AI needs more and more complex silicon that is good for Synopsys. Finally, silicon proliferation and AI chip innovation is driving the build-out of manufacturing capacity and accelerating the transition to new advanced nodes. Foundries count on our EDA and IP to enable each new process node, again, good for Synopsys. These trends reinforce the resiliency of Synopsys business.
Additionally, our customer set is expanding as more companies and more industries define and optimize system performance at the silicon level. As a leading silicon to systems design solutions company, Synopsys opportunity has never been greater. And our planned acquisition of Ansys will expand our TAM and further our mission of empowering technology innovators everywhere. The future of technology R&D require system design solutions with a deeper integration of electronics and physics. That's what we can provide with Ansys, and we're making good progress on closing this important transaction. The regulatory review is proceeding well. We are working cooperatively and constructively with the various regulatory agencies. We have completed all preliminary filings worldwide, customers continue to express their overwhelming support, and we continue to expect the transaction to close in the first half of 2025.
Let's move to segment business highlights, starting with Design Automation. Q3 Design Automation revenue was up 6% year-over-year versus a very strong prior Q3 a as Synopsys Design Automation solutions are helping customers accelerate their innovation despite growing complexity. Growing systemic complexity has turbocharged the criticality of verification and chip design, and we offer the most complete portfolio of solutions in the industry. Our next-generation Verdi platform for advanced debug capabilities was adopted by a large US-based GPU company and a large US mobile SoC company reducing failure debug from days to minutes. While our flagship verification tool VCS displace competition at a large US HPC customer, a large Chinese mobile customer and a large Chinese hyperscaler.
Our AI verification product, VSO.ai is also ramping aggressively demonstrating up to 10x faster turnaround time, double-digit increases in verification coverage, significant reductions in verification compute requirements and better verification quality. A marquee US GPU company deployed VSO.ai across multiple IPs with turnaround time improvements of 2 to 7x and coverage improvements up to 33%. Our hardware-assisted verification business had an excellent quarter as customers upgraded from HAPS 100 to our ZeBu EP product line to leverage 1 hardware platform for both emulation and prototyping. In Q3, we saw a significant ZeBu hardware expansion at a large US hyperscaler in a direct win versus competition.
We also increased ZeBu adoption at a large European IP provider and 2 large US HPC companies, increasing demands for high-performance emulation with the opportunity for large capacity expansion were drivers in these wins. We also worked with several large US systems and hyperscaler customers on successful software bring-up workloads with our HAPS product line. Physical verification was also a point of strength in the quarter. We continue to win new designs on ICV with 20 tape-outs in Q3, 4 of these tape-outs were on TSMC N3 and 1 on IFS 18A, where engagements are increasing rapidly.
Turning to analog design, where our competitive displacements continued in Q3. We now have more than 30 displacements for the year. This quarter, we completed analog full Flow wins at a leading European Tier 1 supplier, a North American IP provider and an Asian SoC vendor, and we displaced competition in analog simulation at 2 US AI accelerator companies and a global analog chip company. Like in verification, our analog customers are looking to Synopsys as a scale multiplier to modernize their flows and unleash the power of AI to move to more advanced process nodes. Our Synopsys.ai engine for analog, ASO.ai now has more than 15 customers in evaluation.
Transitioning to digital, where we continue to expand our leadership in digital EDA across advanced node design flows. Fusion Compiler delivered the world's first mobile SoC tape-out on Samsung's 2-nanometer GAA process, this quarter, along with a number of customer first tape-outs at TSMC N2, N3E and N5. Augmenting Fusion Compiler with our AI engine, DSO.ai creates a powerhouse capability for customers. We are now seeing customer adoption spread to the automotive vertical where a leading Asian automotive silicon company demonstrated 30% power reduction in the design with DSO.ai. On to Design IP, which delivered 32% revenue growth as the IT supplier of choice for leading HPC, AI, automotive and mobile chips at advanced nodes.
Driven by AI bandwidth requirements, hyperscalers are pushing consortiums to pull in specification time lines for interface protocols creating faster innovation cycles and increased opportunity for us and our customers, and we are matching the space with our operational execution. In Q3, we announced the world's first PCIe 7.0 IP solution to enable fast and secure data transfers. We are also seeing increasing momentum in AI edge devices for mobile optimized platforms. We secured 2 major smartphone customers on leading nodes to enable power efficient mobile devices with Gen AI capabilities, while our ARC neural processing unit and DSP processors were adopted into 5 edge applications including 2 new customers.
Turning to multi-die where we have an outstanding lineup of products in the IP and the EDA space for our customers. We continue to broaden our multi-die portfolio, launching 3DIO Foundation IP, which is a specialized IO for 3D multi-die integration. In EDA, 3DIC Compiler momentum continued with the tape-out of multi-die design for an automotive application based on a CoWoS-R interposer and deployment at a major US hyperscaler.
We also announced Intel Foundry EMIB, a reference flow for multi-die enabled by 3DIC compiler to accelerate multi-die designs at all stages from silicon to systems as the on-ramp for the world's foundry we achieved silicon success on Samsung's SF2 and SF4X processes for a range of interface IP. We also demonstrated the industry's first HBM3 operating at 9.6 gigabits per second and TSMC's advanced 3-nanometer processes and partnered with Global Foundries to develop new memory compilers for the 22 FDX process technology targeting edge AI acceleration in automotive and industrial microcontrollers.
A couple of closing comments before we transition to Shelagh's remarks. We are working through final closing conditions for the sale of our Software Integrity business and continue to expect that we'll complete that transaction in the second half of 2024.
And before closing, I want to recognize a monumental award to someone I deeply admire and I'm proud to call both a mentor and a friend. Synopsys Founder and Exec Chair Aart de Geus. Aart was selected to receive the semiconductor industry's highest honor, The 2024 Robert N. Noyce Award. We look forward to celebrating his leadership and outstanding contributions to our industry at the awards ceremony in November. In summary, we have strong continuing momentum across the business, supported by multiple secular growth drivers. We have a very resilient business model and are mission-critical to our customers' innovation. We are aligning our portfolio investment with the greatest return potential to accelerate our growth. Thank you to our employees for their passion and to our partners and customers for trusting us to ignite their future ingenuity.
With that, I'll turn it over to Shelagh.