Sassine Ghazi
President and Chief Executive Officer at Synopsys
Good afternoon. We delivered a strong finish to the year, exceeding the midpoint of our Q4 guidance targets, which caps another record revenue year for Synopsys. A big thank you to our customers, partners and the entire Synopsys team. In FY24, we grew revenue 15% year-over-year and crossed the $6 billion mark, only three years after crossing the $4 billion mark. This is a big achievement, considering it took us 35 years to achieve $4 billion. We've also expanded the bottom line with EPS growing at a 24% CAGR over the last five years. FY24 was also a transformational year for the company. We sharpened our focus on growth segments with the successful sale of our Software Integrity business and we doubled down on our silicon to systems strategy with the pending acquisition of Ansys.
Let me take a few minutes to share some business highlights, and then Shelagh will discuss the financials in more detail. Technology is at a strategic inflection point that presents unprecedented opportunity for Synopsys from silicon to systems. We are operating in an era of pervasive intelligence, which fuels our momentum and is underpinned by multiple secular growth drivers, the megatrend of AI, silicon proliferation and software defined systems. Unlike the broader semiconductor market, which can be cyclical in nature, Synopsys success is tied to technology innovation cycles. The AI-driven reinvention of compute is accelerating the pace, scale and systemic complexity of technology R&D, which in turn expands our opportunity. AI and HPC chip design starts continue at a relentless pace, while end demand in industries like industrial, auto and consumer electronics are recovering more slowly. However, all industries are investing for their AI future, and Synopsys will be strategic partner in helping them realize their ambitions.
Our planned acquisition of Ansys will further our growth into new adjacent areas. Together, we can deliver on the engineering need for the new AI-powered design solutions that fuse electronics and physics, giving R&D teams unprecedented insights into products under development. The regulatory review process is proceeding as expected. I'm pleased to announce that this week, the HSR waiting period has expired and we are working cooperatively with the FTC staff to conclude the investigation and their review of our proposed remedies. This marks an important milestone towards close, which we continue to expect in the first half of 2025. We're also making strong progress with other regulatory agencies and customers remain overwhelmingly supportive of this pro-competitive deal.
Looking ahead to 2025, at the high level, we expect to deliver double-digit revenue growth and 40% operating margin. We will remain focused on execution excellence and operating discipline, while balancing our guidance with pragmatism, given we are readying our company for the largest acquisition in our history and continue to manage macro uncertainties in some geographies. Shelagh will discuss the guidance in more detail.
Let's move to segment business highlights, starting with Design Automation. Q4 Design Automation revenue was up 17% year-over-year and full year revenue was up 12% versus 2023. Our unparalleled Design Automation portfolio provides holistic insight across the flow and includes our industry-leading Fusion Compiler. Fusion Compiler leadership was evident in Q4 as a leading US HPC customer leveraged Fusion Compiler to deliver their first TSMC N2 production tape-out and a leading hyperscaler taped out a novel new SoC on TSMC N4. Since 2020, we've been the pioneers in adding AI optimization engines to our products. We now have Synopsys.ai solutions across the design flow that are delivering extraordinary customer results. Customers have now used DSO.ai to optimize over 700 cumulative tape-outs and have deployed DSO.ai in up to 90% of SoC blocks on some chips. VSO.ai deployments are also accelerating, with one customer seeing up to 4x improvement in hardware utilization and another achieving 2x faster turnaround time.
We're also augmenting the capability of Synopsys.ai by bringing the power of generative AI to our platform. We've now expanded coverage of Copilot knowledge assistance to 11 EDA products, with our customers seeing 30% to 60% faster time to results versus traditional approaches on our flagship products with both hosted commercial LLMs and on-prem deployments with open source LLMs. We and our customers are reskilling and redefining workflow using AI. But this is only the beginning. AI is evolving from a discrete capability to becoming an essential and ubiquitous part of everything we do. We are also on the cusp of a massive architectural revolution in semiconductors.
Multi-die. Acceleration in multi-die designs opens a new frontier in chip architecture that also ushers the daunting complexities that require the integration of design and multi-physics to solve. Today, multi-die is the domain of a small group of customers, but third parties estimate that by 2027, 90% of HPC AI designs and 70% of PC designs will be multi-die. multi-die adoption is also increasing the use of advanced manufacturing nodes, a positive trend for Synopsys. We're partnering with ecosystem leaders like TSMC to improve predictability and yield for multi-die designs. In Q4, TSMC completed a multi-die test chip tape-out demonstrating the industry's only end-to-end unified solution comprising of 3DIC Compiler, Silicon Lifecycle Management, Synopsys test solutions, UCIe and Synopsys.ai. In this case, AI-driven analysis using 3DSO.ai was deployed to address thermal and power integrity challenges for CoWoS interposer packaging. The real game changer for multi-die will be a design environment that fuses design automation and multi-physics simulation in a unified platform. That's a key part of the value proposition for Ansys and why our customers are so supportive of that transaction.
Closing out on Design Automation, we had another record year in our hardware business, with exceptional momentum on both HAPS and ZeBu product lines. During Q4, we had over 50 repeat HAPS customers and more than 10 new customers. Notable among those wins, a US hyperscaler deployed a large HAPS implementation for PCIe 6 software bring up for AI workloads. ZeBu EP momentum also continued with customers seeing value in the reconfigurability of our system to enable all emulation and prototyping use cases. In the quarter, we saw seven repeat customers and eight new customers for ZeBu EP, with a key IP customer deploying ZeBu because of the unique reconfigurability of that platform.
On to Design IP, which was roughly flat in Q4 against a very strong prior year compare. For the full year, Design IP delivered 24% revenue growth with 5 points of adjusted operating margin accretion. Design activity continued to be robust for high performance computing customers with seven PCIe 6 design wins spanning hyperscalers and semiconductor accounts. Protecting data over high speed interfaces continues to be a critical need, and in Q4, we saw another seven wins for security integrity and data encryption over PCIe 6 and CXL 3. We also continue to push technology differentiation in our Ethernet products. In Q4, we achieved the industry's first multi-vendor 800 gig Ethernet demonstration at ECOC 2024, proving the robustness and interoperability of our IP.
With the rapid acceleration of multi-die designs, there is significant demand for increased throughput, and this quarter, we announced the industry's only complete 40 gig UCIe solution that includes controller, PHY and our verification IP. This IP offers 25% higher bandwidth than the UCIe spec with no impact on energy efficiency or area. We secured two 40 gig UCIe design wins in the quarter and ended the year with more than 20 die-to-die design wins. We also saw strength in automotive in the fourth quarter as electrification, infotainment and ADAS features continue to drive strong demand for our comprehensive automotive IP portfolio, with wins at multiple leading automotive SoC vendors. In an industry first, we achieved the third party certification of 40 gigabit per second USB4 IP, an IP title which is vital for automotive and mobile markets.
Switching to manufacturing, where we take great pride in our role as the IP technology on ramp to the world's foundries. We were proud to receive TSMC's 2024 Partner of the Year Award for Interface IP, acknowledging our collaborative success for Synopsys Interface IP on TSMC's most advanced processes.
Before closing out, I want to highlight the power of our technology portfolio with a key company-wide design win. This quarter, we strengthened our decades long partnership with Arm, aligning our roadmaps to the needs of our mutual customers. As a key partner in Arm Total Design, we are integrating Arm compute subsystems with our industry-leading IP, AI-driven EDA solutions and industry-leading hardware accelerated verification solutions. Together, Arm and Synopsys deliver differentiated solutions delivering the next generation of chiplets, SoCs and systems across AI, HPC, automotive, mobile, PC and IoT.
Few closing comments before we transition to Shelagh's remarks. We have strong momentum across the business supported by multiple secular growth drivers. We have a very resilient business model and are mission-critical to our customers' innovation. We are aligning our portfolio investment with the greatest return potential and aligning our operations to accelerate our growth. Thank you to our employees and partners for a transformative 2024. We look forward to igniting our customers' ingenuity in 2025 and beyond.
With that, I'll turn it over to Shelagh.
