Aart de Geus
Chairman and Chief Executive Officer at Synopsys
Good afternoon. We delivered excellent results in the second-quarter exceeding all our guidance targets while reaching another quarterly revenue record. Revenue of $1.395 billion was above the high-end of our guidance range with non-GAAP operating margin at 33.3%. GAAP earnings per share was $1.76, while non-GAAP earnings per share was above the high-end of our target range at $2.64 [phonetic]. We generated $703 million of operating cash-flow and increased our backlog to $7.3 billion.
The market is playing out much as we expected when we planned the year. Demand is weaker for semiconductors overall with consumer markets most impacted. Despite choppy macroeconomic conditions. Customers continue to prioritize R&D for new chip designs, so that they emerge stronger when demand accelerates.
The transition to smart everything is well underway and will drive significant long-term growth for semiconductors and outsized contribution for us. Against this backdrop, we planned and are executing accordingly. Based on continued strong design activity in high confidence in our business, we are raising our full-year revenue guidance range to between $5.79 [phonetic], and $5.83 [phonetic] billion. We are increasing our Year-over-Year non-GAAP ops margin improvement expectation, to 150 basis-points up approximately half a point versus the prior guidance. We are raising our full-year non-GAAP EPS range to between $10.77 and $10.84. Shelagh will discuss the financials in more detail.
Let me give some color for the quarter. In March, we held SNUG our yearly Synopsys Users Group Conference in Silicon Valley. Including its follow-on road shows, we bring together over 12,000 passionate design engineers around our common focus of driving innovation in chip and system design. Right after three years of COVID the conference was fantastically engaging. Our audience fully recognized how design parameters and product requirements have become exponentially more complex and Inter-woven accelerated by the breakthroughs of multi-die designs.
Simultaneously the end-market hunger for smart everything puts huge pressure on increasing performance per[phonetic] -- to the limit. And on-top of that security and safety are now becoming mandatory everywhere. Synopsys' vision and mission of smart, secure and safe this sets both a high bar and foreshadows great opportunities for our customers and our company.
Users told me though that while system complexities are growing exponentially design resources are not. Design productivity thus requires a catalytic step-function change in our approach. To us this inflection comes from AI. We are embedding AI in everything we do. We have made World-class advances in design flow automation and our customers are now adopting Synopsys AI on production designs at a remarkable rate.
This is not by accident. 12 years ago, we called out a vision of Smart Everything unleashed by the intersection of big data and machine-learning. Since then, we applied ML everywhere on our product offering. In 2017, we decided to harness AI for entire deign sub flows and began investing in DSO.ai where DSO stands for Design Space Optimization.
We rapidly progress from prototype to customer validation of AI-driven results in 2019. Recognized by the ASPENCORE IEEE World Electronics Achievement Award for innovative product of the year in 2020. The following year at 2021 hot chips conference we unveiled our pioneer AI journey and roadmap showcased by a slew of remarkable results.
DSO.ai delivered not only better speed and power, large and complex design blocks, but it did so in a fraction of the time, meaning months down to weeks while requiring fewer less specialized designers. This did not go unnoticed as it had been validated weeks earlier by Samsung an early partner announcing the world's first AI driven commercial tape out with DSO.ai. By the end of 2022 adoption, including nine of the top 10 semiconductor vendors have moved forward at great speed with 100 AI driven commercial tape-outs.
Today the tally is well over 200 and continues to increase at a very fast clip as the industry broadly adopts AI for design from Synopsys. But we have not sat still. At SNUG we unveiled the industry's first full stack AI driven EDA suite Synopsys.ai. Specifically, in parallel to second-generation advances in DSO.ai. we announced VSO.ai, which stands for verification space optimization and TSO.ai test space optimization. In addition, we are extending AI across the design stack to include analog design and manufacturing. [Indecipherable] the announcement included NVIDIA TSMC MediaTek Renesas and IBM Research all providing stunning use cases of the rapid progress and criticalities of Synopsys.ai to deliver their breakthrough results.
As an example Renesas achieved up to 10 x improvement in reducing functional coverage holes and up to 30% increase in verification productivity. This is substantial progress. Yes, it's still only the beginning of our AI journey. The roadmap of optimizing, automating and generative AI use cases is wide-open to deliver productivity breakthroughs for years to come.
Turning now to our segment results, let me start with design automation, which accounts for roughly 65% of Synopsys revenue. Design Automation, had a very strong quarter with robust order and revenue growth. Let me lead off by recognizing the one year anniversary of Synopsys Cloud, the industry's first and only SaaS solution that provides customers with a completely browser-based experience, optimized compute, and pre-configured EDA flows.
We are seeing excellent momentum as customers gained significant time-to-market advantages with the industry's only cloud optimized pay-per use business model, providing on demand tool access with cloud scale elasticity. In the past year, we have doubled our customer-base every quarter this year with the SaaS model, accounting for 70% of users.
Market adoption of our Fusion Compiler continues to grow across verticals segments and manufacturing nodes. This quarter we won many major designs, including wins at two top Asian semiconductor companies and a leading high-performance computing company. Fusion Compiler is leading advanced three-nanometer node tape-outs, was roughly 2/3 of designs exclusively using Synopsys flows.
We continue to drive our Design Automation leadership. In Q2, we announced the collaboration with TSMC to deliver digital and custom design EDA flows on their most advanced two nanometer process node. Our 40 Day [phonetic] stack complemented with the timeliness of IP offering allows designer's to jump start the two nanometer designs differentiate their SoCs and accelerate their time-to-market.
Expanding from digital, we continue to grow and displays, competition in the custom-designed market. We earned eight new design-wins in Q2, giving us 23 wins year-to-date. We also benefit from a growing pipeline of top customers using Synopsys for advanced node retargeting.
Transitioning to multi-die chip design, leading the industries transformation from monolithic SoC to multi-die system with a comprehensive and scalable solution for fast heterogeneous integration. In Q2, we deployed our multi-die VCS functional verification at a leading US high-performance computing customer, delivering more than 2x faster turnaround time.
We also announced our collaboration with TSMC and ANSYS for multi-die system design and manufacturing. Providing the industry's most comprehensive EDA and IP solutions on TSMC's advanced process technologies. We've often talked about the unbounded demands for verification. The need for verification exploration is unrelenting.
Our customers want more, more throughput, more capacity and more energy efficiency, all with lower total cost of ownership. This quarter we announced ZeBu server five, the industry's first emulation system with unmatched capacity to enable electronic digital twins of advanced SoCs. ZeBu server five delivers this with 2x higher throughput and 2x lower energy usage compared to our previous generation.
We are seeing pull from a broad range of semiconductor and systems and hyperscaler companies with exceptional adoption results. When launched semiconductor companies saw ZeBu server five deliver a 40% reduction in compile times on multiple large designs. Finally I want to highlight a breakthrough on the manufacturing front that NVIDIA announced at its March GTC Conference. Current lithography is nearing the limits of what physics makes possible. Our collaboration with NVIDIA remedies this by running Synopsys OPC Optical Proximity Correction software on NVIDIA's computational lithography platform named litho [phonetic]. Our collaboration massively reduces compute time from literally weeks to days.
Now let's move to Design IP which is roughly 25% of our revenue. This quarter we're celebrating 25 years of being in the IP business. Starting with simple building blocks and interfaces them we now provide entire IP subsystems. Today we have over 7,500 IP components, supporting 340 process technologies, all driven by the same smart, secure and safe innovation imperative.
[Indecipherable] the business is very strong, with demand fueled by high-performance computing, automotive and mobile applications, where Smart Everything devices need high-speed and secure connectivity increasingly architected for multi-die systems. These systems, drive the need for state-of-the art high speed die to die interfaces, led by UCIE for universal Chiplet Interconnect Express, which is rapidly becoming the industry-standard. We continue to build technical leadership in advanced nodes.
In Q2, we received outstanding silicon results on our 224 gig PHY IP already demonstrated at multiple conferences. We're also achieving excellent silicon results and customer engagement on the advanced three nanometer process across multiple IP products, including our high-speed interfaces and foundation IP. Third the Software Integrity segment which represents around 10% of our revenue.
Another milestone here as well, as we just passed the $500 million, mark in trailing 12-month revenue. The imperative for security and quality and software is vital. Today every meaningful business is a software business. Our solutions help companies improve and manage security and quality vectors across a broad set of vertical end-markets.
Well, this part of our business is the most affected by the challenging macro-environment we delivered solid growth with notable wins across vertical segments, including technology, financial, health-care, and telecommunications.
We also continue to see most of the segment's revenue driven by customers adopting to more [Phonetic] of our solutions as they consolidate providers for efficiency and economics. One last closing point. This week, we released our 2022, ESG report. Throughout this call I highlighted the privilege of delivering world changing technology. For Synopsys, this starts with a commitment to maximize our positive impact and to use our influence to drive broad-based change. I encourage you to read our full report at Synopsys.com.
In summary, we had an excellent Q2 financial results and operational execution, growing confidence in the second-half of the year. We are raising our guidance for full-year revenue to between $5.79 cents and $5.83 [phonetic] billion [Indecipherable]. We now expect to improve full-year non-GAAP ops margin by 150 basis-points versus last year.
We are raising our Year-over-Year non-GAAP earnings per share growth expectation to 21% to 22%. We have a resilient business model uncommon in most software companies. Despite the expected macroeconomic headwinds throughout the year our customers continue to prioritize investments in the chips systems and security that will position them for future growth.
As you heard, we continue to invest in advanced technologies, multi-die design solutions, state-of-the art IP, and the leading-edge EDA AI driven suite to make this decade of smart, secure and safe products happen. I would like to thank our employees and our partners for their dedication and passion that makes this possible. With that I will turn it over to Shelagh.