Sassine Ghazi
President & Chief Operating Officer at Synopsys
Thank you, Art, for your pioneering work in our industry and for building Synopsys into one of the world's essential semiconductor ecosystem companies. I am profoundly grateful for the opportunity to succeed you as CEO, building on our strong foundation and propelling Synopsys to the next wave of growth.
Let's turn to market trends. Despite global macroeconomic uncertainty, our customers continue to prioritize R&D investments and chip design starts remain robust. We leave 2023 with $8.6 billion in non-cancellable backlog and have a time-tested business model that balances dynamic growth with macro resiliency. We expect solid growth across our geographies in 2024, but our outlook reflects a continued challenging near-term growth environment in China. China is an adaptable and large market. However, given the combination of entity list and technology restrictions and a weaker macroeconomic outlook, we believe more pragmatism in our 2024 China forecast is appropriate.
Technology trends continue to create a rising tide for our business. Chief among those trends is a new era of AI-driven productivity. AI is reshaping industries and providing breakthrough solutions for intractable challenges, like the 15% to 30% design resource shortage the semiconductor is facing this decade. We pioneered AI-driven semiconductor design and are relentlessly advancing our AI capabilities so that we can drive step-up function improvement in our customers' productivity and, thus, play a greater role in their success.
Recently at Microsoft Ignite Conference, we announced a breakthrough generative AI capability for accelerating chip design, Synopsys.ai Copilot. The new capability is the result of a strategic collaboration with Microsoft to integrate Azure service that brings the power of GenAI into one of the most complex engineering challenges, the design process for semiconductors.
The integration of GenAI across Synopsys.ai provides chip designers with collaborative capabilities that offer expert tool guidance, generative capabilities to enable RTL and collateral creation, and fully autonomous capabilities for workflow creation from natural language. We're engaged with leading chipmakers including AMD. Intel and Microsoft to deliver the value of GenAI across the Synopsys.ai full EDA stack from design, verification, test to manufacturing. We are at a very early stage of this new AI era, but our initial customer results are exceptional. AI is key to massively unlocking customer productivity, and we are increasing our investment to accelerate the Synopsy.ai roadmap.
Beyond AI, we see multiple other secular tailwinds providing our Design Automation and Design IP business expanding growth opportunities. With the slowing of Moore's Law, increasingly, architecture and design automation are the main levers in delivering semiconductor PPA gains, even as insatiable use case demands push the frontiers of performance and performance per watt. Multi-die implementations are accelerating as our customers seek to optimize cost and yield for these large complex designs. And our customers who rely on our critical competencies from silicon to software now require systems-level approach, both at the semiconductor device level with multi-die and, in the electronic design, software bring-up and software validation of full systems like today's software-defined cars.
Our Design IP business also has strong wind in its sails. Applications crave ever faster ingest and throughput, resulting in faster protocol migrations and increasing IP content value per device. Customers are prioritizing scarce design resources to focus on their critical architectural differentiations and turning to us as an integral part of their chip design development teams for their foundation and interface IP needs. And now, all three leading edge foundries are making Synopsys the advanced node IP vendor of choice. They're partnering with us on a broad range of IP titles to minimize risk and accelerate silicon success.
Our Design Automation and Design IP businesses have both leadership technology and market positions with industry trends playing to our strengths. We're increasing our investment in these segments to capture more of this growing TAM. We started our investments in Software Integrity with the acquisition of Coverity in 2014. Software security was a pain point for every company and risk surfaces were expanding. Customers were searching for innovative approaches in quality and security testing to help reduce the risk of software failures and security breaches. And we developed the broadest portfolio to meet that need.
Flash forward to today, our Software Integrity business has become the leader in application security testing, with industry-leading team delivering over $0.5 billion in trailing 12-months revenue at mid-teens non-GAAP operating margin. We are proud of the significant progress we've made over the last nine years and believe the future opportunity remains attractive. At the same time, we have compelling investment opportunities in Design Automation and Design IP with much higher expected growth and return profiles.
Following our strategic portfolio review and in consultation with the company's Board of Directors, we have decided to explore strategic alternatives for the Software Integrity business. As part of this process, we're considering full range of strategic opportunities. We will provide an update after we conclude that process.
Based on these market and technology trends and with high confidence in our business, here are our 2024 guidance targets. We expect 2024 revenue between $6.57 billion and $6.63 billion. We expect to deliver 37% non-GAAP operating margin, a 200 basis point improvement versus last year. We expect full year non-GAAP EPS between $13.33 and $13.41. Shelagh will discuss the financials in more detail.
Now I'll share some segment highlights starting with Design Automation. This quarter, Synopsys.ai was selected by AspenCore to receive the Word Electronics Achievement Award for EDA software of the year. We're proud of the recognition, but even more excited by the strong customer adoption for Synopsys.ai across the design flow. A major North American hyperscaler made a major commitment to use DSO.ai after demonstrating PPA and productivity benefits on consecutive HPC projects.
In verification, we engaged with over 20 customers in Q4, demonstrating up to 10 times faster turnaround time. While in test, we added eight new customer engagements with Kioxia publicly highlighting more than 50% pattern reduction. Finally, we and TSMC announced that our analog migration flow through Synopsys.ai is enabled across TSMC's advanced process technologies. We are also seeing great results deploying Synopsys.ai internally with our IP teams. Internal IP teams are seeing 10 times turnaround time improvements in time to target verification coverage and have deployed analog design migration flows for TSMC two nanometer.
Fusion Compiler continues to win key designs, including the leading-edge ARM mobile core for the industry's first implementation for a gate-all-around-based mobile SoC. In combination with DSO.ai, Fusion Compiler also delivered 10% better power on gate-all-around-based mobile GPU and modem designs. We saw continued momentum in sign-off delivered by our leadership family of Prime tools. We won multiple engagements with PrimeTime, PrimeClosure, and PrimeShield and saw the world's Top 3 data center providers adopt PrimeClosure to get the fastest ECO closure time for five three-nanometer SoCs.
Expanding our multi-die ecosystem, we received the prestigious leadership award from TSMC, OIP 2023 Partner of the Year, for developing the industry's first 3DIC design prototyping solution, supporting the new industry standard 3Dblox. Verification product momentum also remains strong. This quarter, we announced our AI-driven next generation Verdi solution, which continues its lead in functional debug with deployment already at more than top -- 10 top semiconductor companies. In hardware-assisted verification, we delivered another record year. In Q4, ZeBu won against competition at two large North American hyperscalers, and we expanded our HAPS footprint with a large North American systems company and a large Asian semiconductor company.
Now, turning to Design IP. This quarter, we won our first two-nanometer interface IP engagement with a leading mobile company and are now in production at three nanometer with foundation IP for a high-volume PC chip. We delivered a key multi-die proof point in concert with Intel and TSMC on UCIe interoperability. The demonstration at Intel Innovation showed die-to-die interconnect over UCIe between Synopsys IP on TSMC N3E and Intel Foundry silicon. We saw two other key technology proof points this quarter. We demonstrated interoperability for our 224-gig Ethernet PHY IP and PCIe 6.0 IP, both industry firsts.
On the processor IP side, we announced a new addition to the ARC Processor IP portfolio, the RISC-V ARC-V Processor IP. This product allows customers to choose from a broad range of flexible extensible processor options that deliver optimal power performance efficiency for their target applications. Finally, we delivered a significant win in automotive, displacing competition at a marquee customer in a multi-generation, multiple project agreement.
Now to the Software Integrity segment, which delivered solid growth against a backdrop of continued macro headwinds for enterprise software. In Q4, we saw over 50% year-over-year growth in our Polaris Software Integrity platform. Polaris is a SaaS-based application security testing solution optimized for the needs of development and DevSecOps teams. We were also recently recognized as a leader in the Forrester Wave for software composition analysis. This was based on an evaluation of Black Duck, our software composition analysis solution.
In summary, we had an outstanding Q4 and FY 2023 financial results and operational execution and take tremendous forward momentum into 2024. We have resilient business model, and our customers continue to prioritize investments in the chips and systems that position them for future growth. We are aligning our portfolio investment with the greatest return potential to accelerate our growth. Deepest thanks to our employees, partners and customers for their passion and commitment.
With that, I'll turn it over to Shelagh.